If
you are interested in fast availability of custom design and IP in the latest
process technologies, Sagantec invites you to stop by its booth # 1661 at DAC
2008 in Anaheim to see the reasons why:
3 major semiconductor companies have
recently chosen Sagantec for Analog and Mixed-Signal layout migration!
Leading Storage & Communications, leading Memory and
leading Wireless companies have recently deployed Sagantec for migration to
45nm and 32nm process nodes!
Leading semiconductor company chose Sagantec for a complete
migration of an application processor core!
Register for one or more of the following
demos:
Design Migration to 45nm and beyond
Migration
of Analog/MS design circuit /IP to advanced process technology.
Maintaining
hierarchy, Virtuoso objects, and layout qualities like symmetry and alignment.
Design
Optimization and Correction
-
Rule-Based: Correcting DRC violations;
implementing DFM rules, prioritized application of recommended rules, and
updating foundry rule changes. Can be performed interactively from inside Virtuoso.
-
Model-Based: Optimizing and
correcting litho hot-spots
Tutorial: Migration of a complete custom and semi-custom cell-based core